22 layouter Jobs in Villach | January 2025

Design Application Engineer for Mixed-Signal IC development (f/m/div)

VILLACH

BESTES MATCH

... in Electrical Engineering, Computer Science or equivalent At least 5 years of experience in mixed signal IC design/layout/verification or support Programming skills: Python, Perl, Tcl, SKILL ... mixed-signal EDA tools like Cadence (Virtuoso, Spectre, Xcelium, AMS-Designer, Genus, Innovus), Synopsys (DC, ICC) and Siemens/Mentor (Calibre, Solido) Know-how in full custom layout ... Weitere Informationen ❯

Research Engineer - Photonic MEMS (all genders) // Job-ID: 155-1

SILICON AUSTRIA LABS

VILLACH, 9524

BALDIGER BEWERBUNGSSCHLUSS

... photonic MEMS fabrication between the research unit and cleanroom facilities. Lead the design layout , execution, and analysis of DOE to enhance device performance. Ex ecute small-scale ... in relevant fields such as nanophotonics , nanotechnology, electrical engineering, or related disciplines. Proficiency in hands-on layout design using tools like K-layout, LayoutEditor ... Weitere Informationen ❯

Design Application Engineer for Mixed-Signal IC development (f/m/div)

INFINEON TECHNOLOGIES

VILLACH

... design/layout/verification or support Programming skills : Python, Perl, Tcl, SKILL (Cadence) Knowledge of design languages : System Verilog and or VHDL Strong experience with Unix ... ), Synopsys (DC, ICC) and Siemens / Mentor (Calibre, Solido) Know-how in full custom layout design techniques will be an added advantage Strong team playing and customer orientation skills ... Weitere Informationen ❯

Design Application Engineer for Mixed-Signal IC development (f/m/div)

INFINEON TECHNOLOGIES AUSTRIA AG

VILLACH

... in mixed signal IC design/layout/verification or support Programming skills : Python, Perl, Tcl, SKILL (Cadence) Knowledge of design languages : System Verilog and or VHDL Strong ... , Innovus), Synopsys (DC, ICC) and Siemens / Mentor (Calibre, Solido) Know-how in full custom layout design techniques will be an added advantage Strong team playing and customer ... Weitere Informationen ❯

Design Application Engineer for Mixed-Signal IC development (f/m/div)

INFINEON TECHNOLOGIES AG

VILLACH

... in Electrical Engineering, Computer Science or equivalent At least 5 years of experience in mixed signal IC design/layout/verification or support Programming skills : Python, Perl, Tcl, SKILL ... -signal EDA tools like Cadence (Virtuoso, Spectre, Xcelium, AMS-Designer, Genus, Innovus), Synopsys (DC, ICC) and Siemens / Mentor (Calibre, Solido) Know-how in full custom layout design ... Weitere Informationen ❯

Staff / Principal Analog / Mixed-Signal Design Engineer (M/F/D)

EXTOLL

VILLACH, 9500

... simulation. Collaborate with system architects in block level specification derivation. Work with the verification team in model creation. Work with the layout team to guide physical ... plus (FDSOI, FinFET). Being familiar with the Cadence design flow and full-custom EDA tools, in particular Virtuoso Schematic/Layout, ADE Assembler and Spectre. Script programming ... Weitere Informationen ❯

Senior Scientist - TSV- and Si-Interposer Technologies (all genders) // Job-ID: 159-1

SILICON AUSTRIA LABS

VILLACH, 9524

BALDIGER BEWERBUNGSSCHLUSS

Your future responsibilities R&D for 2.5 D silicon interposers, TSV technologies and 3D stacking Design, layout and microfabrication of interposers and TSVs Concept development ... Weitere Informationen ❯

Internship: Web Development to support Component Validation activities (f/m/div)

INFINEON TECHNOLOGIES AUSTRIA AG

VILLACH

BALDIGER BEWERBUNGSSCHLUSS

... development services DES enables Infineons advanced IC development. This means the complete value creation chain from abstract system models down to the fully verified product layout which ... Weitere Informationen ❯

Internship: Web Development to support Component Validation activities (f/m/div)

INFINEON TECHNOLOGIES

VILLACH

BALDIGER BEWERBUNGSSCHLUSS

... Infineon's advanced IC development. This means the complete value creation chain from abstract system models down to the fully verified product layout which ensures high quality ... Weitere Informationen ❯

Internship: Software Framework for Component Validation (f/m/div)

INFINEON TECHNOLOGIES AUSTRIA AG

VILLACH

BALDIGER BEWERBUNGSSCHLUSS

... value creation chain from abstract system models down to the fully verified product layout which ensures high quality manufacturing readiness We are on a journey to create the best ... Weitere Informationen ❯

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